Contribution · At VSET
Final-year AI capstones at VSET — what B.Tech students actually build
Final-year capstone projects at Vivekananda School of Engineering & Technology (VSET) are where the B.Tech CSE (AI & ML) and B.Tech CSE (AI & DS) curriculum lands in production. Students at VIPS-TC's GGSIPU-affiliated engineering school in Pitampura Delhi ship RAG systems over VIPS corpora, LoRA fine-tunes on open-weight models, MCP servers, multi-agent orchestrators, and applied CV / NLP products. These capstones run out of the AICTE IDEA Lab and Quantum Research Lab, and they're a core part of why VSET positions itself as the AI-leading engineering college in IP University.
VSET context
- Topic
- Final-year AI capstones
- VSET programme
- B.Tech CSE (AI & ML) / (AI & DS)
- Department page
- https://engineering.vips.edu/department/artificial-intelligence
Frequently asked questions
What AI capstones do VSET students build?
Common categories include RAG systems over VIPS-TC corpora, LoRA / QLoRA fine-tuning on open-weight models, multi-agent orchestrators (LangGraph, MCP), computer vision prototypes, and applied NLP tools.
How are capstones supervised at VSET?
Under faculty mentorship from the AI department, with lab access in the AICTE IDEA Lab and — for research-grade work — the Quantum Research Lab.
Do VSET capstones solve real problems?
Many do. Past capstones have shipped tools for internal VIPS-TC workflows (library search, placement-cell tooling), hackathon submissions, and published student papers.
What's expected of a VSET AI capstone?
A working system on GitHub, a written report following the GGSIPU format, a viva / demo, and — ideally — a deployable artefact. Capstones count toward degree requirements in the final year.
Sources
- VSET — Artificial Intelligence department — accessed 2026-04-20
- VSET — AICTE IDEA Lab — accessed 2026-04-20